Anritsu Corporation announced that Qualitas Semiconductor, a developer of PHY IP solutions for high-speed interconnects, has selected Anritsu’s ShockLine 4-Port Performance Vector Network Analyzer (MS46524B) to support signal integrity testing in its interface IP development.
By integrating this VNA into its verification setup, Qualitas has created a testing environment capable of delivering precise and repeatable signal-integrity measurements across the entire system, including PHY IP. This approach helps improve the overall quality and reliability of its high-speed interface IP solutions.
Qualitas develops high-speed interface IP solutions, including SerDes PHY IP, PCI Express PHY IP, UCIe interconnect solutions, and Ethernet PHY IP, and it collaborates with global customers across advanced semiconductor markets in fields such as AI, data centers, automotive, and mobile systems.
As semiconductor interface technologies continue to increase data transmission speeds, system-level verification that includes the characteristics of the entire interconnect channel, such as the PCB, package, and socket, has become increasingly important, rather than just the performance of the chips. In high-speed signal environments, factors such as transmission loss, reflection, and crosstalk affect signal integrity, making precise measurement-based verification environments essential.
To address these requirements, Qualitas has adopted Anritsu’s ShockLine MS46524B to analyze the characteristics of high-speed interconnect channels and quantitatively verify signal integrity, based on differential S-parameter analysis and time-domain reflectometry (TDR) measurements.
The ShockLine MS46524B provides high-frequency measurement stability, support for mixed probe and coaxial cable environments, and high-resolution TDR measurement capabilities, enabling precise analysis of subtle impedance variations occurring in the package and PCB structures. Through this approach, Qualitas has established a verification environment that is close to the conditions of real systems, enabling it to provide the reliability required in the PHY IP development process.
Anritsu highlights the importance of signal integrity verification solutions and measurement technologies that are required in next-generation interface technology environments, and it plans to support semiconductor and high-speed interface development companies in building more efficient verification environments.
This case study is available on the official Anritsu website as follows:
The Forefront of Ultra-High-Speed Interconnect Development Test Solutions Supporting Advanced Technologies
In this article with Dr. Jaeyoung Kim, the executive director of the R&D Center at Qualitas, he introduces the verification strategies to strengthen competitiveness in the global semiconductor market, the technical challenges encountered during the development of high-speed interface verification environments, and the solutions implemented.
※ PCI-SIG, PCIe, and PCI Express are registered trademarks of PCI-SIG.
