HighPoint Technologies, a leader in high-performance PCI Express (PCIe) switching and storage expansion solutions, has unveiled its External CopprLink PCIe Architecture. Built on the PCI-SIG CopprLink standard, this innovative system sets a new standard for disaggregated AI, HPC, and professional media workflows, offering an impressive 64 GB/s of native throughput and exceptional interoperability.
A Vendor-Neutral Foundation for PCIe 5.0 and PCIe 6.0 Technology Interoperability
As AI and data-intensive workloads continue to outpace the thermal and power thresholds of conventional server chassis, the need for a standardized external expansion framework has become mission-critical. HighPoint’s new connectivity fabric is built upon the PCI-SIG CopprLink (CDFP) specification (SFF-TA-1032) to facilitate a truly vendor-neutral hardware environment. By adhering to this open industry standard, HighPoint ensures that today’s PCIe 5.0 technology investments are fully forward-compatible with the emerging PCIe 6.0 specification, providing a sustainable, long-term ROI for data centers and enterprise IT architects.
Uncompromised PCIe 5.0 x16 Architecture Throughput: Extending Native 64GB/s Performance to 2-Meter External Fabrics
HighPoint’s external CopprLink PCIe Architecture provides unparalleled flexibility for IT professionals. This managed fabric is a comprehensive ecosystem comprising intelligent PCIe switching or Retimer-based host adapters, professional-grade PCIe 5.0 x16 CopprLink cabling, and active, Switching or Retimer-equipped expansion nodes.
While the CopprLink specification provides the high-density physical medium, HighPoint’s architecture takes it a step further by actively managing the high-frequency 32GT/s signals at the hardware level. This ensures a dedicated, native 64GB/s pipeline that is immune to the signal degradation and “down-training” inherent in passive cabling solutions. For the first time, enterprises can deploy high-TDP accelerators, such as the NVIDIA H200, in external enclosures up to 2.0 meters away without sacrificing a single byte of PCIe 5.0 technology performance.
The Power of Native PCIe Performance: Zero Protocol Overhead
Unlike legacy connectivity solutions such as Thunderbolt or USB4, which “tunnel” PCIe data through intermediate protocols, HighPoint’s External Fabric delivers a Direct PCIe Pathway.
“Our underlying technology is engineered for ‘Native PCIe 5.0 transfer speeds.’ By eliminating the ‘protocol tax’ associated with tunneling, we provide a zero-overhead connection that mirrors the performance of a card plugged directly into the motherboard,” explains May Hwang, Director of Marketing at HighPoint Technologies. “This architecture allows for 64GB/s of bi-directional bandwidth and near-zero latency, which is essential for GPU-driven AI training, unquantized LLM acceleration, and real-time 8K video rendering.”
“PCI-SIG is pleased to see member companies like HighPoint Technologies leveraging the CopprLink specification to encourage innovation in the PCIe technology ecosystem,” said PCI-SIG President and Chairperson Al Yanes. “By implementing the CopprLink standard for external connectivity, HighPoint is helping to provide the high-bandwidth, low-latency performance required by today’s AI and data-centric workloads while providing standardized, interoperable technology for the industry.”
Introducing the CopprLink Ecosystem: Host Link and Expansion Node Synergy
The first physical implementation of HighPoint’s External CopprLink PCIe Architecture includes a high-performance “Host-to-Device” highway designed for mission-critical stability:
Rocket 7634D – The CopprLink Host Link: The industry’s first independent PCIe 5.0 x16 External CDFP Host Interface Card. The integrated Broadcom PCIe switch enables the HIC to manage signal integrity and bandwidth at the host level, providing a stable, non-blocking 64GB/s pipeline for any external device.
Rocket 7638D – The Hybrid Switching Powerhouse: HighPoint’s flagship PCIe 5.0 x16 adapter utilizes a sophisticated 48-lane PCIe 5.0 Switching architecture. It features one external CDFP/CopprLink port for fabric expansion and two internal PCIe 5.0 MCIOx8 ports. These internal ports are designed for maximum versatility, supporting NVMe storage or high-performance PCIe devices (GPUs, FPGAs) via MCIO-to-PCIe 5.0 x16 bridge cards.
RocketStor 8631D – The CopprLink Expansion Node: The robust, enterprise grade PCIe 5.0 x16 expansion enclosure employs Astera Labs active retimers to regenerate the PCIe signal, thereby overcoming the physical limitations associated with external cabling solutions to support the world’s most demanding accelerators.
An Open Invitation for Industry Collaboration
HighPoint is committed to fostering an open, high-performance hardware ecosystem. We are actively inviting Host and Device manufacturers, OEMs, and System Integrators to collaborate on the CopprLink standard.
Whether you are developing specialized communications servers or next-generation AI accelerators, HighPoint provides the verified external hardware infrastructure and firmware customization needed to integrate CopprLink connectivity into your product portfolio. HighPoint’s engineering teams are dedicated to accelerating your OEM integration projects. We offer deep-level technical support to embed our CopprLink-compliant technology directly into your product roadmap, providing the architectural expertise and firmware optimization required to ensure your solution arrives at market as a fully-fledged, PCIe 5.0 technology-ready platform.
