Abstract
The increasing reliance on AI, machine learning, and cloud-based applications has driven an unprecedented demand for compact, efficient, and reliable power conversion solutions. This article presents a quarter-brick DC-to-DC converter reference design for legacy data center 48V intermediate bus conversion, offering superior performance compared to existing market alternatives. The design leverages Analog Devices’ discrete solution within a common footprint package, delivering a highly competitive and scalable solution to meet the growing requirements of high-performance applications, including hyperscale computing and industrial systems.
Introduction
The quarter-brick module (QBM) reference design is a high-performance DC-to-DC converter based on Analog Devices, Inc.’s (ADI’s) quarter-brick (QB) system architecture. It incorporates a new series of coupled inductors to meet strict Distributed-Power Open Standards Alliance (DOSA) dimension requirements while delivering 2kW of continuous power within the constraints of a common footprint package (CFP). With this design approach, the QBM solution reduces the accumulated and traditional power losses from a hard switching converter and enhances operational efficiency, providing a robust solution for demanding applications.
By leveraging ADI’s latest 48V/54V to 12V intermediate bus conversion (IBC) technology, the reference design simplifies complexity and enables rapid development cycles for customers. Comprehensive data presented in this article demonstrates measurable improvements in efficiency, thermal performance, and scalability—positioning this solution as a next-generation power module for legacy higher power demand data center environments. Furthermore, its architecture supports current IBC requirements and offers a pathway for future high-voltage systems operating on 400V to 800V bus supplies.
QBM Design
The QBM reference design adheres to the DOSA standard mechanical pinout commonly used in the market, as seen in Figure 1, ensuring seamless integration into existing system boards. When operating as a single module, the pinout can be simplified to include only PMBus signals. The detailed pin configuration is provided in Table 1.
Table 1. Pin Configuration of ADI’s Quarter-Brick Module Reference Design
| Pin No. | Pin Name | Function |
| 1 | +VIN | Positive input pin |
| 2 | RC | DC-to-DC EN |
| 3 | -VIN | Negative input pin |
| 4, 5 | -VO | Negative output pin |
| 6 | PG | Power good |
| 7, 8 | +VO | Positive output pin |
| 9 | SS | Soft start pin |
| 10 | CLK_IN | External clock input |
| 11 | -VSNS | Negative remote sense output |
| 12 | SDA | PMBus data |
| 13 | SALERT | PMBus alert |
| 14 | SCL | PMBus clock |
| 15 | SA1 | PMBus ASEL1 address tri-state |
| 16 | SA0/+VSNS | PMBus ASEL0 address tri-state/ positive remote sense output |
| 17 | ISHARE | Active current-sharing pin |










